The Intel Xeon Phi course will not only discuss how to maximize performance and optimize applications for the co-processor but it will also introduce the audience to the use of accelerators in general and how they can best be put to use in applications that are currently existent and those which are about to be designed from the ground up in the "accelerator era". This training will cover using the Beacon machine at NICS, the Stampede machine at TACC, and SuperMIC at LSU, since they all now use ibrun.symm and have Xeon Phis in the entire system. This training will be given at the University of Tennessee; there is no charge for registration. The training will cover basic paradigms for using the MIC architecture as well as MPI, OpenMP 4.0, and vectorization. Hands-on activities are included.
From a user perspective, supercomputers are more complicated to program and handle than an ordinary desktop workstation. Unfortunately, this leads to parallel programs that do no necessarily satisfy the performance expectations of the users. Such unexpected performance results can have many reasons. Basic knowledge on performance modeling, prediction and verification, as taught in this summer school, is needed by users to formulate and verify their performance expectations.
This two-day in-person training covers all aspects of visualizing data from a broad variety of domains. The training kicks off with an introduction to visualization followed by best practices when dealing with diverse data (abstract and spatial), demonstrating a variety of methods and techniques on those data sets and demonstrating a range of freely available software. Real world problems for which visualization is needed will be demonstrated and attendees will be taken through the process of visualizing this data and gaining insight.
REGISTRATION WILL BE OPEN IN APRIL - MAY TIME FRAME. PLEASE CHECK BACK FOR LINK TO REGISTRATION AT THAT TIME.